LPTV-Aware Bit Loading and Channel Estimation in Broadband PLC for Smart Grid

Power line communication (PLC) has received steady interest over recent decades because of its economic use of existing power lines, and is one of the communication technologies envisaged for Smart Grid (SG) infrastructure. However, power lines are not designed for data communication, and this brings unique challenges for data communication over power lines. In particular for broadband (BB) PLC, the channel exhibits linear periodically time varying (LPTV) behavior synchronous to the AC mains cycle. This is due to the time varying impedances of electrical devices that are connected to the power grid. Another challenge is the impulsive noise in addition to power line background noise, which is due to switching events in the power line network. In this work, we focus on two major aspects of an orthogonal frequency division multiplexing (OFDM) system for BB PLC LPTV channels; bit and power allocation, and channel estimation (CE). First, we investigate the problem of optimal bit and power allocation, in order to increase bit rates and improve energy efficiency. We present that the application of a power constraint that is averaged over many microslots can be exploited for further performance improvements through bit loading. Due to the matroid structure of the optimization problem, greedy-type algorithms are proven to be optimal for the new LPTV-aware bit and power loading. Significant gains are attained especially for poor (i.e. high attenuation) channel conditions, and at reduced transmit-power levels, where the energy per bit-transmission is also low. Next, two mechanisms are utilized to reduce the complexity of the optimal LPTV-aware bit loading and peak microslot power levels: (i) employing representative values from microslot transfer functions, and (ii) power clipping. The ideas of LPTV-aware bit loading, complexity reduction mechanism, and